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ESP32-S3 Chip Xtensa LX7 32-Bit Dual-Core Wi-Fi Bluetooth 5(LE) SoC 240MHz 45 GPIO QFN56
ESP32-S3 Product Overview
The ESP32-S3 is a low-power MCU-based system on a chip (SoC) from Espressif Systems, integrating 2.4GHz Wi-Fi and Bluetooth 5 (LE) wireless communication. Featuring an Xtensa® 32-bit LX7 dual-core processor running at up to 240MHz, it is equipped with 512KB SRAM and 384KB ROM in a QFN-56 (7×7mm) package with 45 programmable GPIOs, operating from 3.0V to 3.6V over a -40℃ to +105℃ temperature range. Manufactured on a low-power 40nm process, the ESP32-S3 delivers high RF performance, stability, versatility, and reliability with ultra-low power consumption for diverse application scenarios. The chip adds vector instructions for accelerating neural network computation and signal processing, making it ideal for AIoT applications such as wake-word detection, speech command recognition, face detection and recognition, smart home, smart appliances, smart control panels, and smart speakers.
| Model | ESP32-S3 Series (ESP32-S3, ESP32-S3FN8, ESP32-S3R8, ESP32-S3RH2, etc.) |
| CPU Core | Xtensa® 32-bit LX7 Dual-Core |
| Max Frequency | 240 MHz |
| CoreMark Score | Dual-core 240MHz: 1181.60 CoreMark (4.92 CoreMark/MHz) |
| Floating Point Unit | Single-precision FPU |
| Data Bus | 128-bit with SIMD instructions |
| Wi-Fi | IEEE 802.11b/g/n, 2.4GHz, 20/40MHz BW, 1T1R up to 150Mbps |
| Bluetooth | Bluetooth 5 (LE), Bluetooth Mesh, 20dBm high-power mode |
| Bluetooth Rates | 125Kbps / 500Kbps / 1Mbps / 2Mbps |
| GPIO | 45 programmable GPIOs (including 4 strapping GPIOs) |
| On-Chip Memory | ROM: 384KB, SRAM: 512KB, RTC SRAM: 16KB |
| In-Package Flash / PSRAM | Optional 1.8V or 3.3V, up to 16MB Flash / 8MB PSRAM (model dependent) |
| Security | SHA, RSA, AES, HMAC, Digital Signature, Secure Boot, Flash Encryption, Permission Control |
| Peripheral Interfaces | 4×SPI, LCD, Camera, USB OTG, USB Serial/JTAG, I2S, I2C, UART, LED PWM, MCPWM, RMT, SD/MMC, GDMA |
| Coprocessors | ULP-RISC-V, ULP-FSM |
| Process | 40nm Low-Power |
| Package | QFN56 (7×7 mm) |
ESP32-S3 Applications
Smart home control panels and voice interaction terminals
Industrial automation wireless sensor nodes
Camera video streaming and image recognition
USB devices and Wi-Fi + Bluetooth network cards
Generic low-power IoT sensor hubs and data loggers
Service robots and consumer electronics
FAQ
Q: How capable is ESP32-S3 for AI inference?
A: The Xtensa LX7 dual-core processor supports 128-bit SIMD instructions and a single-precision FPU, achieving 1181.60 CoreMark at 240MHz dual-core. Espressif provides ESP-DL and ESP-NN machine learning libraries for deploying quantized pre-trained models on-device, enabling voice wake-up, image classification, and vibration monitoring.
Q: What wireless protocols are supported?
A: 2.4GHz Wi-Fi (IEEE 802.11b/g/n) and Bluetooth 5 (LE) with Bluetooth Mesh. Wi-Fi and Bluetooth share an antenna with internal coexistence. Bluetooth transmit power reaches 20dBm in high-power mode.
Q: What is the package and pin count?
A: QFN56 (7×7 mm) package with 45 programmable GPIOs. Six GPIOs are allocated for in-package Flash or PSRAM, and four are strapping GPIOs. The ESP32-S3FH4R2 uses a QFNWB (7×7 mm) package.
Q: What is the difference between ESP32-S3 and ESP32?
A: ESP32-S3 uses a newer Xtensa LX7 dual-core architecture (LX6 in ESP32), supports SIMD instructions and larger in-package PSRAM. GPIO count increases to 45, adding USB OTG and USB Serial/JTAG. Bluetooth is upgraded to Bluetooth 5 (LE), but Classic Bluetooth (BR/EDR) is not supported.
Q: How do I choose a specific ESP32-S3 model?
A: Choose by in-package memory: ESP32-S3FN8 for 8MB Flash; ESP32-S3R8 for 8MB PSRAM; ESP32-S3RH2 for 2MB PSRAM; ESP32-S3RH6V for 1.8V 6MB PSRAM; ESP32-S3FH4R2 for compact QFNWB with 4MB Flash + 2MB PSRAM.
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- Model:
- ESP32-S3
- CPU Core:
- Xtensa LX7 Dual-Core 32-Bit
- Max Frequency:
- 240 MHz
- FPU:
- Single-precision
- Wi-Fi:
- IEEE 802.11b/g/n, 2.4GHz, 1T1R 150Mbps
- Bluetooth:
- Bluetooth 5 (LE), Bluetooth Mesh
- ROM:
- 384 KB
- SRAM:
- 512 KB + 16 KB RTC SRAM
- Coprocessors:
- ULP-RISC-V, ULP-FSM
- Process:
- 40nm