ESP32-S3 vs ESP32-C6: The Complete Low-Power IoT Selection Guide

1、Complete Selection Guide for ESP32-S3 and ESP32-C6

ESP32-S3 and ESP32-C6 are the two mainstream SoCs from Espressif with the greatest positioning differences in the IoT field. If their difference were summarized in just one dimension: the ESP32-C6 is born for "connectivity," while the ESP32-S3 is born for "computing." In low-power IoT scenarios, this positioning difference directly determines the selection direction.

1.1 Core Parameter Comparison

1.2 Interpretation of Key Differences

Essential difference in CPU architecture. The ESP32-S3 uses a dual-core Xtensa LX7 with a clock frequency of up to 240 MHz and a dual-core CoreMark score of 1181.60, making it suitable for compute-intensive tasks requiring parallel processing. The ESP32-C6, by contrast, uses a heterogeneous dual-core RISC-V design—a 160 MHz high-performance core handles application logic, while a 20 MHz low-power core is dedicated to background tasks, maintaining system responsiveness while keeping power consumption low.

Generational difference in wireless protocols. The ESP32-C6 supports Wi-Fi 6 and introduces Target Wake Time (TWT), a key energy-saving mechanism—devices can negotiate wake-up time windows with the router and sleep deeply during non-communication periods, fundamentally reducing the power consumption of Wi-Fi connections. At the same time, the ESP32-C6 natively supports Zigbee 3.0 and Thread 1.3, making it the preferred platform for building Matter smart home devices. The ESP32-S3, however, supports only Wi-Fi 4 and BLE 5.0 and lacks an 802.15.4 protocol stack.

1.3 Selection Framework for Low-Power Scenarios

2、Beginner's Guide to Low-Power IoT Design

2.1 Understanding the "Iceberg Model" of Power Consumption

The core challenge of low-power design is that the Deep-sleep current in the datasheet often does not equal the actual board-level power consumption. Some developers have measured that an ESP32-S3 development board with PSRAM has an actual current of about 5 mA in Deep-sleep mode, far exceeding the chip's nominal 240 µA. The root cause is the static leakage current of the PSRAM and peripheral circuits. Therefore, low-power design must be optimized level by level from chip to module to system.

2.2 Key Points of Low-Power Design for ESP32-C6

First, make full use of the TWT mechanism. In Wi-Fi applications, call ESP-IDF's to configure TWT parameters and align the device's communication window with the AP. After actual measurement with a 10 ms wake-up interval, the standby current can be reduced to around 5 µA (with a reasonable sleep strategy).

Second, make good use of the LP core. The low-power RISC-V core of the ESP32-C6 can run independently while the HP core sleeps, handling lightweight tasks such as timer interrupts and sensor polling, avoiding frequent wake-ups of the main core.

Third, choose the correct clock source. In Light-sleep mode, the power consumption using a 32.768 kHz external crystal (34 µA) is far lower than that of a solution using the main crystal (3.3 mA). Be sure to reserve a location for a 32.768 kHz crystal in the hardware design.

2.3 Key Points of Low-Power Design for ESP32-S3

First, correct use of the ULP coprocessor. The ESP32-S3 supports both ULP-FSM and ULP-RISC-V coprocessors, which can perform tasks such as ADC sampling and I²C sensor reading while the main CPU is in deep sleep. Actual measurement data show that when the ULP runs periodically at a 1% duty cycle, the average Deep-sleep current can be reduced to about 22 µA (excluding board-level leakage).

Second, avoid the static power trap of PSRAM. If the project does not require PSRAM, it is recommended to disable PSRAM-related configurations in Menuconfig; if it is required, PSRAM must be placed in low-power mode before Deep-sleep, otherwise the leakage current may reach the milliampere level.

Third, dynamic frequency scaling (DFS) and automatic Light-sleep. Enable DFS through, allowing the system to automatically switch the CPU frequency between 40 MHz and 240 MHz according to load, significantly reducing dynamic power consumption under low load.

2.4 Three Common Design Mistakes

Mistake 1: Ignoring the quiescent current of the LDO. Many development boards use LDOs such as the AMS1117, whose quiescent current is as high as 5 mA, enough to render any chip-level low-power design futile. Low-power projects should use LDOs with quiescent current below 10 µA (such as the TPS7A02 series).

Mistake 2: Floating GPIO leakage. If unused GPIOs are left floating, they may cause additional power consumption due to input buffer oscillation. It is recommended to configure all unused GPIOs as output low or enable internal pull-downs.

Mistake 3: Peripheral power not isolated. If peripherals such as sensors, LEDs, and SD cards remain connected to power during Deep-sleep, they will continue to consume current. Their power should be cut off through MOSFETs or load switches when the peripherals are not working.

3、Project Case: ESP32-C6 Low-Power Sensor Node in Practice

3.1 Solar-Powered Thread Plant Monitor

A public open-source project demonstrates the actual performance of the ESP32-C6 in an extremely low-power scenario: a solar-powered plant monitor built on ESPHome and ESP32-C6 collects data through a capacitive soil moisture sensor and connects directly to Home Assistant via the Thread protocol. It is powered entirely by a solar panel and requires no battery replacement.

Design points:

•  ESP32-C6's Deep-sleep mode, waking once every 15 minutes to collect data.

• Communicate via the Thread protocol to avoid the high power overhead of Wi-Fi connections.

• Use a solar panel + supercapacitor for energy storage, eliminating the maintenance of replacing lithium batteries.

3.2 Low-Power Environmental Data Logger

An environmental data logger project built with the DFRobot Beetle ESP32-C6 uses the ESP32-C6's deep sleep function, together with a multifunction environmental sensor and the Qubitro IoT platform, to achieve long-term battery-powered environmental monitoring.

Key data: With a 640 mAh lithium battery, the standby time in Deep-sleep mode (about 1 mA, including board-level leakage) can reach about 26 days; if the board-level peripheral circuits are further optimized and a more aggressive sleep strategy is used, battery life can be extended to the level of several months.

3.3 Why Don't These Cases Use the ESP32-S3?

The common characteristics of the above scenarios are: low sensor data collection frequency, small data volume, and no need for local AI inference. This is exactly the target scenario for which the ESP32-C6 was designed. If the ESP32-S3 were used instead, although performance would be excessive, the Deep-sleep current would be about 7 times higher, and battery life would be greatly shortened.

4、Application Scenarios

4.1 Advantageous Scenarios for ESP32-C6

Battery-powered sensor nodes are the most core application scenario for the ESP32-C6. A Deep-sleep current of 34 µA means that, with appropriate battery capacity and wake-up strategy, the device can operate continuously for months or even years. Typical applications include soil moisture monitoring, air quality detection, door/window sensors, and more.

Matter/Thread smart home devices: The ESP32-C6 is one of the chips with the strongest Matter compatibility in Espressif's product line. It can serve as a Matter over Wi-Fi end device or a Matter over Thread end device, and can also be combined with other Espressif SoCs to build a Thread border router.

Zigbee terminals and gateways: The ESP32-C6 has a built-in IEEE 802.15.4 baseband and MAC layer and can directly run the Zigbee 3.0 protocol stack, making it suitable for low-power Zigbee terminal devices such as smart lighting and smart door locks.

In high-density Wi-Fi network environments: Wi-Fi 6's OFDMA and MU-MIMO mechanisms can significantly improve multi-device concurrency efficiency, while the TWT mechanism reduces device power consumption. In AP-dense scenarios such as office buildings and factory floors, the ESP32-C6 offers better stability and energy efficiency than Wi-Fi 4 solutions.

4.2 Advantageous Scenarios for ESP32-S3

Edge AI inference is the core competitiveness of the ESP32-S3. Its Xtensa LX7 dual-core supports vector instructions and, together with the ESP-DSP and ESP-NN libraries, can perform tasks such as face recognition, voice wake-up, and image classification locally without cloud support.

HMI devices with screens: The ESP32-S3 provides an LCD parallel interface (8–16-bit RGB) and a DVP camera interface, and its 45 GPIOs can connect to a rich set of sensors and peripherals. It is suitable for scenarios such as smart home central control panels and industrial dashboards.

Audio processing and voice interaction: The dual-core 240 MHz architecture can ensure the real-time performance of audio codec and network transmission.

5、FAQs

Q1: For a low-power IoT project, should I choose ESP32-C6 or ESP32-S3?

Core criterion: whether local AI inference or driving a screen/camera is required. If only sensor acquisition and wireless communication are needed, the ESP32-C6's Deep-sleep current (34 µA) is only one-seventh of the ESP32-S3's (240 µA), giving it a significant battery-life advantage. If AI vision, voice processing, or HMI display is required, the ESP32-S3 is the more suitable choice.

Q2: Is the ESP32-C6's 34 µA Deep-sleep current chip-level or module-level?

This is a chip-level figure. The Deep-sleep current of an actual module or development board is affected by factors such as LDO quiescent current, USB-UART bridge chips, and PSRAM, and is usually far higher than the chip's nominal value. For example, some developers have measured the minimum current of an ESP32-C6 Zero development board at about 667 µA. Low-power projects must pay attention to board-level leakage.

Q3: What work can the ESP32-S3's ULP coprocessor do in place of the main CPU?

The ULP coprocessor can perform tasks such as ADC sampling, temperature sensor reading, and I²C/SPI sensor polling while the main CPU is in deep sleep. The ESP32-S3 supports both ULP-FSM and ULP-RISC-V coprocessors. ULP-RISC-V programming is more flexible and is suitable for sensor processing scenarios requiring a certain amount of computing capability.

Q4: How much power can the ESP32-C6's Wi-Fi 6 TWT mechanism actually save?

TWT allows a device to negotiate wake-up time windows with the AP and turn off the radio during non-communication periods. In sensor-type applications (such as waking once every 10 ms), TWT combined with Light-sleep can reduce average power consumption to the hundreds-of-µA level. Some projects have measured a target standby current of about 5 µA after TWT configuration (chip-level, requiring cooperation with deep sleep).

Q5: Can the ESP32-C6 run Thread and Zigbee at the same time?

No, they cannot run simultaneously. The ESP32-C6's 802.15.4 radio is shared, and only one of Thread or Zigbee can run at a time. However, protocol switching can be implemented in firmware, or a multiprotocol solution (such as running BLE + Thread simultaneously) can be used.

Q6: Do the ESP32-S3's vector instructions help with low power consumption?

They help to a certain extent. Vector instructions can accelerate neural network inference and signal processing, shortening task execution time and thus returning to sleep faster. However, the ESP32-S3 lacks an independent LP core like the ESP32-C6, so its energy efficiency in lightweight tasks such as sensor polling is not as good as the C6's.

Q7: What should be noted when migrating from ESP32-S3 to ESP32-C6?

It mainly involves three aspects: first, the CPU architecture changes from Xtensa to RISC-V, and some code that depends on Xtensa assembly needs to be rewritten; second, the number of GPIOs drops from 45 to 30, so peripheral connections need to be re-planned; third, the wireless protocol stack changes, and Wi-Fi 6 TWT configuration requires additional API calls. ESP-IDF provides good migration support, but projects that deeply use S3-specific features (such as LCD/Camera interfaces) are not recommended to migrate.

Q8: Which key Wi-Fi 6 features does the ESP32-C6 support?

The ESP32-C6 supports 802.11ax 20 MHz-only non-AP mode, OFDMA (uplink and downlink), downlink MU-MIMO, beamforming receive side, DCM dual-carrier modulation, spatial reuse, and TWT target wake time. However, it does not support the 5 GHz band or 160 MHz bandwidth, making it a low-cost simplified implementation of Wi-Fi 6.

Q9: Is the power consumption difference between the two large in BLE low-power connection scenarios?

In pure BLE connection scenarios, the difference between the two is relatively small. The ESP32-C6's BLE protocol stack requires a minimum frequency of about 80 MHz, with about 25–30 mA in Light-sleep (BLE connection maintained). The ESP32-S3's Light-sleep current in BLE scenarios is about 230 µA (chip-level), but in actual use both are more affected by connection parameters (connection interval, slave latency).

Q10: Can the ESP32-C6's LP core run user programs independently?

Yes. The ESP32-C6's LP RISC-V core (20 MHz) can run independently while the HP core sleeps, performing tasks such as GPIO control, timers, and LP UART/LP I²C communication. The LP SRAM capacity is 16 KB, enough to run lightweight user code, but it is not suitable for complex application logic.

6、Summary

For battery-powered sensor/connectivity devices, choose ESP32-C6; for devices requiring AI inference or human-machine interaction, choose ESP32-S3.

In the specific dimension of low-power IoT, the ESP32-C6's advantages are structural:

• Deep-sleep current 34 µA vs. 240 µA—about a 7× gap, directly determining the order of magnitude of battery life.

• Wi-Fi 6 TWT—reduces the power overhead of Wi-Fi connections from the protocol layer.

• Native 802.15.4 support—Thread/Zigbee is far more energy-efficient than Wi-Fi and is an ideal choice for sensor networks.

• Independent LP core—a 20 MHz RISC-V core can maintain system response while the main core sleeps.

The ESP32-S3's low-power capability is not without value; its ULP coprocessor and dynamic frequency scaling allow it to maintain a reasonable power level "when computing is needed." However, the "performance DNA" of its 240 MHz dual-core architecture makes it more suitable for scenarios with clear computing requirements—AI vision, voice interaction, and HMI display.

If your IoT device is mainly about "sensing + transmission," the ESP32-C6 is the more correct starting point; if the device also needs "understanding + presentation," then the ESP32-S3 is worth the power-consumption cost.

Shenzhen Qixinwei Technology Co., Ltd. focuses on electronic component supply, BOM kitting, part number matching, and supply chain solutions. It can assist in selecting corresponding products based on specific project requirements, covering one-stop supply support for mainstream chips and supporting components from Espressif, TI, ST, and others.